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Motor driver ICs
FDD spindle motor driver
BA6482AK
The BA6482AK is an FDD spindle motor driver that employs a 3-phase, full-wave, soft switching drive system. This highperformance IC contains a digital servo, an index amplifier, and a power save circuit. FApplications Floppy disk drives FFeatures 1) 3-phase, full-wave, soft switching drive system. 2) Digital servo circuit. 3) Power save circuit. FAbsolute maximum ratings (Ta = 25_C)
4) Hall power supply switch. 5) Motor speed changeable. 6) Index amplifier.
FRecommended operating conditions (Ta = 25_C)
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FBlock diagram
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FPin descriptions
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FInput / output circuits
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FElectrical characteristics (unless otherwise noted, Ta = 25_C, VCC = 5V)
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Motor driver ICs
FCircuit operation (1) Motor drive circuits The motor driver employs a 3-phase, full-wave, soft switching current drive system, in which the rotor position is sensed by Hall devices. The motor drive current is sensed by a small resistor (RNF). The total drive current is controlled and limited by sensing the voltage developed across this resistor. The motor drive circuit consists of Hall amplifiers, an amplitude control circuit, a driver, an error amplifier, a current feedback amplifier, and a saturation prevention amplifier (Fig. 15). The waveforms of different steps along the signal path from the Hall devices to the motor driver output are shown in Fig. 16. The Hall amplifiers receive the Hall device voltage signals as differential inputs. Next, by deducting the voltage signal of Hall device 2 from the voltage signal of Hall device 1, current signal H1, which has a phase 30 degrees ahead of Hall device 1, is created. Current signals H2 and H3 are created likewise. The amplitude control circuit then amplifies the H1, H2, and H3 signals according to the current feedback amplifier signal. Then, drive current signals are produced at A1, A2, and A3 by applying a constant magnification factor. Because a soft switching system is employed, the drive current has low noise and a low total current ripple. The total drive current is controlled by the error amplifier input voltage. The error amplifier has a voltage gain of about -11dB (a factor of 0.28). The current feedback amplifier regulates the total drive current, so that the error amplifier output voltage (V1) becomes equal to the VRNF voltage, which has been voltage-converted from the total drive current through the RNF pin. If V1 exceeds the current limiter voltage (Vcl), the constant voltage Vcl takes precedence, and a current limit is provided at the level of Vcl / RNF. The current feedback amplifier tends to oscillate because it receives all the feedback with a gain of 0dB. To prevent this oscillation, connect an external capacitor to the CNF pin for phase compensation and for reducing the high frequency gain. (2) Speed control circuit The speed control circuit is a non-adjustable digital servo system that uses a frequency locked loop (FLL). The circuit consists of an 1 / 2 frequency divider, an FG amplifier, and a speed discriminator (Fig. 17). An internal reference clock is generated from an external clock signal input or an oscillator (clock signal input.).
BA6482AK
The 1 / 2 frequency divider reduces the frequency of the OSC signal. The FG amplifier amplifies the minute voltage generated by the motor FG pattern and produces a rectangular-shaped speed signal. The FG amplifier gain (GFG = 42dB, typical) is determined by the internal resistance ratio. For noise filtering, a high-pass filter is given by C3 and a resistor of 1.6k (typical), and a low-pass filter is given by C4 and a resistor of 200k (typical). The cutoff frequencies of high-pass and low-pass filters (fH and fL, respectively) are given by: fH= 1 1.6k fL= 1 200k
2
C3
2
C4
The C3 and C4 capacitances should be set so as to satisfy the following relationship: fHtfFGtfL where fFG is the FG frequency. Note that the FG amplifier inputs have a hysteresis. The speed discriminator divides the reference clock and compares it with the reference frequency, and then outputs an error pulse according to the frequency difference. The motor rotational speed N is given by: fosc 1 S (1) z n fosc is the reference clock frequency, n is (speed discriminator count) 2, z is the FG tooth number. The discriminator count depends on the speed control pin voltage. N = 60 S
The integrator flattens out the error pulse of the speed discriminator and creates a control signal for the motor drive circuit (Fig. 18). (3) Index amplifier The index amplifier receives the Hall device signals as differential inputs and amplifies the signals. The hall inputs have a hysteresis. The delay time can be set arbitrarily in the delay circuit with the external constants.
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(4) Other circuits S Start / stop circuit The start / stop circuit puts the IC to the operational state when the control pin is LOW, and to the standby state (circuit current is nearly zero) when the control pin is HIGH. The Hall device bias switch, which is linked to the start / stop circuit, is turned off during the standby state, so that the Hall device current is shut down. FCircuit operation
BA6482AK
S Thermal shutdown circuit This circuit shuts down the IC currents when the chip junction temperature is increased to about 170_C (typical). The thermal shutdown circuit is deactivated when the temperature drops to about 140_C (typical).
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FApplication example
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FOperation notes (1) Thermal shutdown circuit This circuit shuts down all the IC currents when the chip junction temperature is increased to about 170_C (typical). The circuit is deactivated when the temperature drops to about 140_C (typical). (2) Hall devices connection Hall devices can be connected in either series or parallel. When connecting in series, care must be taken not to allow the Hall output to exceed the Hall common-mode input range. (3) Hall input level Switching noise may occur if the Hall input voltage (pins 13X18) is too high. Differential inputs of about 100mV (peak to peak) are recommended. (4) Ceramic oscillator external constants The appropriate external constants vary with ceramic oscillator types. Consult with the ceramic oscillator manufacturer when determining the constants.
BA6482AK
(5) Oscillator external input An external clock can be directly input to the IC from OSC2 (pin 26) without a coupling capacitor. Leave OSC1 (pin 27) open in this case. The OSC2 voltage should be more than the VCC voltage and less than the ground voltage. (6) Relationship between the Hall input signal and the motor output signal The 3-phase Hall input signal is amplified by the amplifier, and further amplified and combined in the matrix circuit. The signal is then converted to current in the amplitude control circuit and sent to the output driver to provide the motor drive current. The phase of the motor output signal is 30 degrees (typical) ahead of the phase of the Hall input signal. (7) Although the quality of this IC is rigorously controlled, the IC may be destroyed when the supply voltage or the operating temperature exceeds its absolute maximum rating. Because short mode or open mode cannot be specified when the IC is destroyed, be sure to take physical safety measures, such as fusing, if any of the absolute maximum ratings might be exceeded.
FElectrical characteristic curves
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BA6482AK
FExternal dimensions (Units: mm)
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